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vendor: Update vendor dir from a80c0fda
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1
vendor/github.com/minio/sha256-simd/.travis.yml
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vendor/github.com/minio/sha256-simd/.travis.yml
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@ -21,3 +21,4 @@ matrix:
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script:
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script:
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- diff -au <(gofmt -d .) <(printf "")
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- diff -au <(gofmt -d .) <(printf "")
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- go test -race -v ./...
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- go test -race -v ./...
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- go tool vet -asmdecl .
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17
vendor/github.com/minio/sha256-simd/README.md
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vendor/github.com/minio/sha256-simd/README.md
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@ -1,6 +1,6 @@
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# sha256-simd
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# sha256-simd
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Accelerate SHA256 computations in pure Go using AVX512 and AVX2 for Intel and ARM64 for ARM. On AVX512 it provides an up to 8x improvement (over 3 GB/s per core) in comparison to AVX2.
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Accelerate SHA256 computations in pure Go using AVX512, SHA Extensions and AVX2 for Intel and ARM64 for ARM. On AVX512 it provides an up to 8x improvement (over 3 GB/s per core) in comparison to AVX2. SHA Extensions give a performance boost of close to 4x over AVX2.
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## Introduction
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## Introduction
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@ -8,7 +8,19 @@ This package is designed as a replacement for `crypto/sha256`. For Intel CPUs it
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This package uses Golang assembly. The AVX512 version is based on the Intel's "multi-buffer crypto library for IPSec" whereas the other Intel implementations are described in "Fast SHA-256 Implementations on Intel Architecture Processors" by J. Guilford et al.
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This package uses Golang assembly. The AVX512 version is based on the Intel's "multi-buffer crypto library for IPSec" whereas the other Intel implementations are described in "Fast SHA-256 Implementations on Intel Architecture Processors" by J. Guilford et al.
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## New: Support for AVX512
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## New: Support for Intel SHA Extensions
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Support for the Intel SHA Extensions has been added by Kristofer Peterson (@svenski123), originally developed for spacemeshos [here](https://github.com/spacemeshos/POET/issues/23). On CPUs that support it (known thus far Intel Celeron J3455 and AMD Ryzen) it gives a significant boost in performance (with thanks to @AudriusButkevicius for reporting the results; full results [here](https://github.com/minio/sha256-simd/pull/37#issuecomment-451607827)).
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```
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$ benchcmp avx2.txt sha-ext.txt
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benchmark AVX2 MB/s SHA Ext MB/s speedup
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BenchmarkHash5M 514.40 1975.17 3.84x
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```
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Thanks to Kristofer Peterson, we also added additional performance changes such as optimized padding, endian conversions which sped up all implementations i.e. Intel SHA alone while doubled performance for small sizes, the other changes increased everything roughly 50%.
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## Support for AVX512
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We have added support for AVX512 which results in an up to 8x performance improvement over AVX2 (3.0 GHz Xeon Platinum 8124M CPU):
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We have added support for AVX512 which results in an up to 8x performance improvement over AVX2 (3.0 GHz Xeon Platinum 8124M CPU):
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@ -66,6 +78,7 @@ Below is the speed in MB/s for a single core (ranked fast to slow) for blocks la
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| Processor | SIMD | Speed (MB/s) |
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| Processor | SIMD | Speed (MB/s) |
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| --------------------------------- | ------- | ------------:|
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| --------------------------------- | ------- | ------------:|
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| 3.0 GHz Intel Xeon Platinum 8124M | AVX512 | 3498 |
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| 3.0 GHz Intel Xeon Platinum 8124M | AVX512 | 3498 |
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| 3.7 GHz AMD Ryzen 7 2700X | SHA Ext | 1979 |
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| 1.2 GHz ARM Cortex-A53 | ARM64 | 638 |
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| 1.2 GHz ARM Cortex-A53 | ARM64 | 638 |
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| 3.0 GHz Intel Xeon Platinum 8124M | AVX2 | 449 |
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| 3.0 GHz Intel Xeon Platinum 8124M | AVX2 | 449 |
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| 3.1 GHz Intel Core i7 | AVX | 362 |
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| 3.1 GHz Intel Core i7 | AVX | 362 |
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||||||
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27
vendor/github.com/minio/sha256-simd/sha256blockAvx2_amd64.s
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27
vendor/github.com/minio/sha256-simd/sha256blockAvx2_amd64.s
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@ -32,8 +32,6 @@
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// equivalents
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// equivalents
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//
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//
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#include "textflag.h"
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DATA K256<>+0x000(SB)/8, $0x71374491428a2f98
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DATA K256<>+0x000(SB)/8, $0x71374491428a2f98
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DATA K256<>+0x008(SB)/8, $0xe9b5dba5b5c0fbcf
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DATA K256<>+0x008(SB)/8, $0xe9b5dba5b5c0fbcf
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DATA K256<>+0x010(SB)/8, $0x71374491428a2f98
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DATA K256<>+0x010(SB)/8, $0x71374491428a2f98
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@ -114,16 +112,25 @@ DATA K256<>+0x258(SB)/8, $0x0b0a090803020100
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GLOBL K256<>(SB), 8, $608
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GLOBL K256<>(SB), 8, $608
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// func blockAvx2(h []uint32, message []uint8)
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// We need 0x220 stack space aligned on a 512 boundary, so for the
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TEXT ·blockAvx2(SB), 7, $0
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// worstcase-aligned SP we need twice this amount, being 1088 (=0x440)
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//
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// SP aligned end-aligned stacksize
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// 100013d0 10001400 10001620 592
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// 100013d8 10001400 10001620 584
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// 100013e0 10001600 10001820 1088
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// 100013e8 10001600 10001820 1080
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MOVQ ctx+0(FP), DI // DI: &h
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// func blockAvx2(h []uint32, message []uint8)
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MOVQ inp+24(FP), SI // SI: &message
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TEXT ·blockAvx2(SB),$1088-48
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MOVQ inplength+32(FP), DX // len(message)
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MOVQ h+0(FP), DI // DI: &h
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MOVQ message_base+24(FP), SI // SI: &message
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MOVQ message_len+32(FP), DX // len(message)
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ADDQ SI, DX // end pointer of input
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ADDQ SI, DX // end pointer of input
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MOVQ SP, R11 // copy stack pointer
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MOVQ SP, R11 // copy stack pointer
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SUBQ $0x220, SP // sp -= 0x220
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ADDQ $0x220, SP // sp += 0x220
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ANDQ $0xfffffffffffffc00, SP // align stack frame
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ANDQ $0xfffffffffffffe00, SP // align stack frame
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ADDQ $0x1c0, SP
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ADDQ $0x1c0, SP
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MOVQ DI, 0x40(SP) // save ctx
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MOVQ DI, 0x40(SP) // save ctx
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MOVQ SI, 0x48(SP) // save input
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MOVQ SI, 0x48(SP) // save input
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@ -1435,7 +1442,7 @@ loop2:
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done:
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done:
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MOVQ BP, SP
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MOVQ BP, SP
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MOVQ 0x58(SP), SP
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MOVQ 0x58(SP), SP // restore saved stack pointer
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WORD $0xf8c5; BYTE $0x77 // vzeroupper
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WORD $0xf8c5; BYTE $0x77 // vzeroupper
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RET
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RET
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2
vendor/github.com/minio/sha256-simd/sha256blockAvx512_amd64.s
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vendor/github.com/minio/sha256-simd/sha256blockAvx512_amd64.s
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@ -2,7 +2,7 @@ TEXT ·sha256X16Avx512(SB), 7, $0
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MOVQ digests+0(FP), DI
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MOVQ digests+0(FP), DI
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MOVQ scratch+8(FP), R12
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MOVQ scratch+8(FP), R12
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MOVQ mask_len+32(FP), SI
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MOVQ mask_len+32(FP), SI
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MOVQ r14+24(FP), R13
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MOVQ mask_base+24(FP), R13
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MOVQ (R13), R14
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MOVQ (R13), R14
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LONG $0x92fbc1c4; BYTE $0xce
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LONG $0x92fbc1c4; BYTE $0xce
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LEAQ inputs+48(FP), AX
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LEAQ inputs+48(FP), AX
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28
vendor/github.com/minio/sha256-simd/sha256blockAvx_amd64.s
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28
vendor/github.com/minio/sha256-simd/sha256blockAvx_amd64.s
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@ -232,15 +232,15 @@
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ADDL R13, h // h = h + S1 + CH + k + w + S0 + MAJ
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ADDL R13, h // h = h + S1 + CH + k + w + S0 + MAJ
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// func blockAvx(h []uint32, message []uint8, reserved0, reserved1, reserved2, reserved3 uint64)
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// func blockAvx(h []uint32, message []uint8, reserved0, reserved1, reserved2, reserved3 uint64)
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TEXT ·blockAvx(SB), 7, $0
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TEXT ·blockAvx(SB), 7, $0-80
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MOVQ h+0(FP), SI // SI: &h
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MOVQ h+0(FP), SI // SI: &h
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MOVQ message+24(FP), R8 // &message
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MOVQ message_base+24(FP), R8 // &message
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MOVQ lenmessage+32(FP), R9 // length of message
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MOVQ message_len+32(FP), R9 // length of message
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CMPQ R9, $0
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CMPQ R9, $0
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JEQ done_hash
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JEQ done_hash
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ADDQ R8, R9
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ADDQ R8, R9
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MOVQ R9, _inp_end+64(FP) // store end of message
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MOVQ R9, reserved2+64(FP) // store end of message
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// Register definition
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// Register definition
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// a --> eax
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// a --> eax
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@ -269,7 +269,7 @@ TEXT ·blockAvx(SB), 7, $0
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MOVOU shuf00BA<>(SB), X10 // shuffle xBxA -> 00BA
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MOVOU shuf00BA<>(SB), X10 // shuffle xBxA -> 00BA
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MOVOU shufDC00<>(SB), X12 // shuffle xDxC -> DC00
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MOVOU shufDC00<>(SB), X12 // shuffle xDxC -> DC00
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MOVQ message+24(FP), SI // SI: &message
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MOVQ message_base+24(FP), SI // SI: &message
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loop0:
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loop0:
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LEAQ constants<>(SB), BP
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LEAQ constants<>(SB), BP
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@ -284,25 +284,25 @@ loop0:
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MOVOU 3*16(SI), X7
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MOVOU 3*16(SI), X7
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LONG $0x0041c2c4; BYTE $0xfd // VPSHUFB XMM7, XMM7, XMM13
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LONG $0x0041c2c4; BYTE $0xfd // VPSHUFB XMM7, XMM7, XMM13
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MOVQ SI, _inp+72(FP)
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MOVQ SI, reserved3+72(FP)
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MOVD $0x3, DI
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MOVD $0x3, DI
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// schedule 48 input dwords, by doing 3 rounds of 16 each
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// schedule 48 input dwords, by doing 3 rounds of 16 each
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loop1:
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loop1:
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LONG $0x4dfe59c5; BYTE $0x00 // VPADDD XMM9, XMM4, 0[RBP] /* Add 1st constant to first part of message */
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LONG $0x4dfe59c5; BYTE $0x00 // VPADDD XMM9, XMM4, 0[RBP] /* Add 1st constant to first part of message */
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||||||
MOVOU X9, _xfer+48(FP)
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MOVOU X9, reserved0+48(FP)
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FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
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FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
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||||||
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LONG $0x4dfe59c5; BYTE $0x10 // VPADDD XMM9, XMM4, 16[RBP] /* Add 2nd constant to message */
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LONG $0x4dfe59c5; BYTE $0x10 // VPADDD XMM9, XMM4, 16[RBP] /* Add 2nd constant to message */
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||||||
MOVOU X9, _xfer+48(FP)
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MOVOU X9, reserved0+48(FP)
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FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
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FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
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||||||
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||||||
LONG $0x4dfe59c5; BYTE $0x20 // VPADDD XMM9, XMM4, 32[RBP] /* Add 3rd constant to message */
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LONG $0x4dfe59c5; BYTE $0x20 // VPADDD XMM9, XMM4, 32[RBP] /* Add 3rd constant to message */
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||||||
MOVOU X9, _xfer+48(FP)
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MOVOU X9, reserved0+48(FP)
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FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
|
FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
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||||||
|
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||||||
LONG $0x4dfe59c5; BYTE $0x30 // VPADDD XMM9, XMM4, 48[RBP] /* Add 4th constant to message */
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LONG $0x4dfe59c5; BYTE $0x30 // VPADDD XMM9, XMM4, 48[RBP] /* Add 4th constant to message */
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MOVOU X9, _xfer+48(FP)
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MOVOU X9, reserved0+48(FP)
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ADDQ $64, BP
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ADDQ $64, BP
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FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
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FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
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||||||
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@ -313,14 +313,14 @@ loop1:
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|||||||
|
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loop2:
|
loop2:
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LONG $0x4dfe59c5; BYTE $0x00 // VPADDD XMM9, XMM4, 0[RBP] /* Add 1st constant to first part of message */
|
LONG $0x4dfe59c5; BYTE $0x00 // VPADDD XMM9, XMM4, 0[RBP] /* Add 1st constant to first part of message */
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||||||
MOVOU X9, _xfer+48(FP)
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MOVOU X9, reserved0+48(FP)
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DO_ROUND( AX, BX, CX, R8, DX, R9, R10, R11, 48)
|
DO_ROUND( AX, BX, CX, R8, DX, R9, R10, R11, 48)
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||||||
DO_ROUND(R11, AX, BX, CX, R8, DX, R9, R10, 52)
|
DO_ROUND(R11, AX, BX, CX, R8, DX, R9, R10, 52)
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||||||
DO_ROUND(R10, R11, AX, BX, CX, R8, DX, R9, 56)
|
DO_ROUND(R10, R11, AX, BX, CX, R8, DX, R9, 56)
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||||||
DO_ROUND( R9, R10, R11, AX, BX, CX, R8, DX, 60)
|
DO_ROUND( R9, R10, R11, AX, BX, CX, R8, DX, 60)
|
||||||
|
|
||||||
LONG $0x4dfe51c5; BYTE $0x10 // VPADDD XMM9, XMM5, 16[RBP] /* Add 2nd constant to message */
|
LONG $0x4dfe51c5; BYTE $0x10 // VPADDD XMM9, XMM5, 16[RBP] /* Add 2nd constant to message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
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||||||
ADDQ $32, BP
|
ADDQ $32, BP
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||||||
DO_ROUND( DX, R9, R10, R11, AX, BX, CX, R8, 48)
|
DO_ROUND( DX, R9, R10, R11, AX, BX, CX, R8, 48)
|
||||||
DO_ROUND( R8, DX, R9, R10, R11, AX, BX, CX, 52)
|
DO_ROUND( R8, DX, R9, R10, R11, AX, BX, CX, 52)
|
||||||
@ -351,9 +351,9 @@ loop2:
|
|||||||
ADDL (7*4)(SI), R11 // H7 = h + H7
|
ADDL (7*4)(SI), R11 // H7 = h + H7
|
||||||
MOVL R11, (7*4)(SI)
|
MOVL R11, (7*4)(SI)
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||||||
|
|
||||||
MOVQ _inp+72(FP), SI
|
MOVQ reserved3+72(FP), SI
|
||||||
ADDQ $64, SI
|
ADDQ $64, SI
|
||||||
CMPQ _inp_end+64(FP), SI
|
CMPQ reserved2+64(FP), SI
|
||||||
JNE loop0
|
JNE loop0
|
||||||
|
|
||||||
done_hash:
|
done_hash:
|
||||||
|
2
vendor/github.com/minio/sha256-simd/sha256blockSha_amd64.s
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2
vendor/github.com/minio/sha256-simd/sha256blockSha_amd64.s
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@ -2,7 +2,7 @@
|
|||||||
|
|
||||||
// SHA intrinsic version of SHA256
|
// SHA intrinsic version of SHA256
|
||||||
|
|
||||||
// Minio Cloud Storage, (C) 2018 Minio, Inc.
|
// Kristofer Peterson, (C) 2018.
|
||||||
//
|
//
|
||||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
// you may not use this file except in compliance with the License.
|
// you may not use this file except in compliance with the License.
|
||||||
|
28
vendor/github.com/minio/sha256-simd/sha256blockSsse_amd64.s
generated
vendored
28
vendor/github.com/minio/sha256-simd/sha256blockSsse_amd64.s
generated
vendored
@ -244,15 +244,15 @@
|
|||||||
ADDL R13, h // h = h + S1 + CH + k + w + S0 + MAJ
|
ADDL R13, h // h = h + S1 + CH + k + w + S0 + MAJ
|
||||||
|
|
||||||
// func blockSsse(h []uint32, message []uint8, reserved0, reserved1, reserved2, reserved3 uint64)
|
// func blockSsse(h []uint32, message []uint8, reserved0, reserved1, reserved2, reserved3 uint64)
|
||||||
TEXT ·blockSsse(SB), 7, $0
|
TEXT ·blockSsse(SB), 7, $0-80
|
||||||
|
|
||||||
MOVQ h+0(FP), SI // SI: &h
|
MOVQ h+0(FP), SI // SI: &h
|
||||||
MOVQ message+24(FP), R8 // &message
|
MOVQ message_base+24(FP), R8 // &message
|
||||||
MOVQ lenmessage+32(FP), R9 // length of message
|
MOVQ message_len+32(FP), R9 // length of message
|
||||||
CMPQ R9, $0
|
CMPQ R9, $0
|
||||||
JEQ done_hash
|
JEQ done_hash
|
||||||
ADDQ R8, R9
|
ADDQ R8, R9
|
||||||
MOVQ R9, _inp_end+64(FP) // store end of message
|
MOVQ R9, reserved2+64(FP) // store end of message
|
||||||
|
|
||||||
// Register definition
|
// Register definition
|
||||||
// a --> eax
|
// a --> eax
|
||||||
@ -281,7 +281,7 @@ TEXT ·blockSsse(SB), 7, $0
|
|||||||
MOVOU shuf00BA<>(SB), X10 // shuffle xBxA -> 00BA
|
MOVOU shuf00BA<>(SB), X10 // shuffle xBxA -> 00BA
|
||||||
MOVOU shufDC00<>(SB), X12 // shuffle xDxC -> DC00
|
MOVOU shufDC00<>(SB), X12 // shuffle xDxC -> DC00
|
||||||
|
|
||||||
MOVQ message+24(FP), SI // SI: &message
|
MOVQ message_base+24(FP), SI // SI: &message
|
||||||
|
|
||||||
loop0:
|
loop0:
|
||||||
LEAQ constants<>(SB), BP
|
LEAQ constants<>(SB), BP
|
||||||
@ -296,7 +296,7 @@ loop0:
|
|||||||
MOVOU 3*16(SI), X7
|
MOVOU 3*16(SI), X7
|
||||||
LONG $0x380f4166; WORD $0xfd00 // PSHUFB XMM7, XMM13
|
LONG $0x380f4166; WORD $0xfd00 // PSHUFB XMM7, XMM13
|
||||||
|
|
||||||
MOVQ SI, _inp+72(FP)
|
MOVQ SI, reserved3+72(FP)
|
||||||
MOVD $0x3, DI
|
MOVD $0x3, DI
|
||||||
|
|
||||||
// Align
|
// Align
|
||||||
@ -306,22 +306,22 @@ loop0:
|
|||||||
loop1:
|
loop1:
|
||||||
MOVOU X4, X9
|
MOVOU X4, X9
|
||||||
LONG $0xfe0f4466; WORD $0x004d // PADDD XMM9, 0[RBP] /* Add 1st constant to first part of message */
|
LONG $0xfe0f4466; WORD $0x004d // PADDD XMM9, 0[RBP] /* Add 1st constant to first part of message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
|
||||||
FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
|
FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
|
||||||
|
|
||||||
MOVOU X4, X9
|
MOVOU X4, X9
|
||||||
LONG $0xfe0f4466; WORD $0x104d // PADDD XMM9, 16[RBP] /* Add 2nd constant to message */
|
LONG $0xfe0f4466; WORD $0x104d // PADDD XMM9, 16[RBP] /* Add 2nd constant to message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
|
||||||
FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
|
FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
|
||||||
|
|
||||||
MOVOU X4, X9
|
MOVOU X4, X9
|
||||||
LONG $0xfe0f4466; WORD $0x204d // PADDD XMM9, 32[RBP] /* Add 3rd constant to message */
|
LONG $0xfe0f4466; WORD $0x204d // PADDD XMM9, 32[RBP] /* Add 3rd constant to message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
|
||||||
FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
|
FOUR_ROUNDS_AND_SCHED(AX, BX, CX, R8, DX, R9, R10, R11)
|
||||||
|
|
||||||
MOVOU X4, X9
|
MOVOU X4, X9
|
||||||
LONG $0xfe0f4466; WORD $0x304d // PADDD XMM9, 48[RBP] /* Add 4th constant to message */
|
LONG $0xfe0f4466; WORD $0x304d // PADDD XMM9, 48[RBP] /* Add 4th constant to message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
|
||||||
ADDQ $64, BP
|
ADDQ $64, BP
|
||||||
FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
|
FOUR_ROUNDS_AND_SCHED(DX, R9, R10, R11, AX, BX, CX, R8)
|
||||||
|
|
||||||
@ -333,7 +333,7 @@ loop1:
|
|||||||
loop2:
|
loop2:
|
||||||
MOVOU X4, X9
|
MOVOU X4, X9
|
||||||
LONG $0xfe0f4466; WORD $0x004d // PADDD XMM9, 0[RBP] /* Add 1st constant to first part of message */
|
LONG $0xfe0f4466; WORD $0x004d // PADDD XMM9, 0[RBP] /* Add 1st constant to first part of message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
|
||||||
DO_ROUND( AX, BX, CX, R8, DX, R9, R10, R11, 48)
|
DO_ROUND( AX, BX, CX, R8, DX, R9, R10, R11, 48)
|
||||||
DO_ROUND(R11, AX, BX, CX, R8, DX, R9, R10, 52)
|
DO_ROUND(R11, AX, BX, CX, R8, DX, R9, R10, 52)
|
||||||
DO_ROUND(R10, R11, AX, BX, CX, R8, DX, R9, 56)
|
DO_ROUND(R10, R11, AX, BX, CX, R8, DX, R9, 56)
|
||||||
@ -341,7 +341,7 @@ loop2:
|
|||||||
|
|
||||||
MOVOU X5, X9
|
MOVOU X5, X9
|
||||||
LONG $0xfe0f4466; WORD $0x104d // PADDD XMM9, 16[RBP] /* Add 2nd constant to message */
|
LONG $0xfe0f4466; WORD $0x104d // PADDD XMM9, 16[RBP] /* Add 2nd constant to message */
|
||||||
MOVOU X9, _xfer+48(FP)
|
MOVOU X9, reserved0+48(FP)
|
||||||
ADDQ $32, BP
|
ADDQ $32, BP
|
||||||
DO_ROUND( DX, R9, R10, R11, AX, BX, CX, R8, 48)
|
DO_ROUND( DX, R9, R10, R11, AX, BX, CX, R8, 48)
|
||||||
DO_ROUND( R8, DX, R9, R10, R11, AX, BX, CX, 52)
|
DO_ROUND( R8, DX, R9, R10, R11, AX, BX, CX, 52)
|
||||||
@ -372,9 +372,9 @@ loop2:
|
|||||||
ADDL (7*4)(SI), R11 // H7 = h + H7
|
ADDL (7*4)(SI), R11 // H7 = h + H7
|
||||||
MOVL R11, (7*4)(SI)
|
MOVL R11, (7*4)(SI)
|
||||||
|
|
||||||
MOVQ _inp+72(FP), SI
|
MOVQ reserved3+72(FP), SI
|
||||||
ADDQ $64, SI
|
ADDQ $64, SI
|
||||||
CMPQ _inp_end+64(FP), SI
|
CMPQ reserved2+64(FP), SI
|
||||||
JNE loop0
|
JNE loop0
|
||||||
|
|
||||||
done_hash:
|
done_hash:
|
||||||
|
2
vendor/modules.txt
vendored
2
vendor/modules.txt
vendored
@ -95,7 +95,7 @@ github.com/lib/pq
|
|||||||
github.com/lib/pq/oid
|
github.com/lib/pq/oid
|
||||||
# github.com/matttproud/golang_protobuf_extensions v1.0.1
|
# github.com/matttproud/golang_protobuf_extensions v1.0.1
|
||||||
github.com/matttproud/golang_protobuf_extensions/pbutil
|
github.com/matttproud/golang_protobuf_extensions/pbutil
|
||||||
# github.com/minio/sha256-simd v0.0.0-20190104231041-e529fa194128
|
# github.com/minio/sha256-simd v0.0.0-20190117184323-cc1980cb0338
|
||||||
github.com/minio/sha256-simd
|
github.com/minio/sha256-simd
|
||||||
# github.com/oschwald/geoip2-golang v1.1.0
|
# github.com/oschwald/geoip2-golang v1.1.0
|
||||||
github.com/oschwald/geoip2-golang
|
github.com/oschwald/geoip2-golang
|
||||||
|
Loading…
Reference in New Issue
Block a user